ARM64_Lab

How Windows reports the 12-core Snapdragon X Elite topology (L3 cache reported as 0)

In this article
  1. Asking Win32_Processor
  2. Why only 12 graphs appear
  3. Architecture 12 means ARM64
  4. L3CacheSize 0 is not evidence
  5. ClockSpeed also looks like a fixed value
  6. Be careful with other zero values too
  7. Keep only the values that are usable

Get-CimInstance Win32_Processor returned 0 for L3CacheSize. I had to look twice when I first saw it.

I had been using a Surface Pro 11th Edition with a Snapdragon X Elite for more than a year, but August 2, 2026 was the first time I seriously read its CPU topology. I had kept postponing the question of how Windows presents this SoC while following benchmark results instead. A high-end 12-core SoC with zero last-level cache is not a plausible reading. I immediately felt that something was wrong, but leaving it unexplored was careless.

The purpose this time was less to collect values than to separate the fields that are safe to use from those that are hard to trust. WMI output is convenient, but taking every populated field at face value makes it easy to misread L3CacheSize as 0 or CurrentClockSpeed as 3417.

Asking Win32_Processor

I used the following form of command. It printed Name, NumberOfCores, NumberOfLogicalProcessors, MaxClockSpeed, CurrentClockSpeed, L2CacheSize, L3CacheSize, Architecture, and AddressWidth directly.

Get-CimInstance Win32_Processor |
    Select-Object Name, NumberOfCores, NumberOfLogicalProcessors,
                  MaxClockSpeed, CurrentClockSpeed,
                  L2CacheSize, L3CacheSize, Architecture, AddressWidth
Field Value
Name Snapdragon(R) X 12-core X1E80100 @ 3.40 GHz
NumberOfCores 12
NumberOfLogicalProcessors 12
MaxClockSpeed 3417
CurrentClockSpeed 3417
L2CacheSize 36864
L3CacheSize 0
Architecture 12
AddressWidth 64

Looking only at the table, the machine appears to have 12 cores, 12 logical processors, 36,864 KB of L2, 0 L3, architecture 12, and address width 64. The problem is that the same table mixes values that can be used directly with values that are questionable as reports. All the numbers are displayed, but they do not deserve equal trust.

Why only 12 graphs appear

NumberOfCores and NumberOfLogicalProcessors are both 12, so this SoC has no SMT. A comparable Intel or AMD processor would have 24 logical processors, but this one stops at 12.

I initially thought the 12 graphs in Task Manager were a display quirk or a bug. I did not expect it to be by design. Counting again with Win32_Processor confirmed that 12 is correct. I had assumed there were 24, so I had carried that misunderstanding for months.

This difference shows up directly in workloads that benefit from parallelism. On this machine, sending more than 12 parallel tasks did not make them faster, so I cap build and test parallelism at 12. Work with a lot of I/O wait may justify submitting a few more, but for CPU-only work I now start questioning the setup once it goes beyond 12.

Architecture 12 means ARM64

The value 12 for Architecture means ARM64. x64 returns 9 and x86 returns 0. If a script only needs to know which architecture it is running on, this property is convenient.

The PROCESSOR_ARCHITECTURE environment variable provides similar information. However, under emulation it sometimes answered x64. I have seen that mismatch on this machine, so I changed my scripts to inspect the WMI side. This matters when writing small diagnostic scripts on ARM64 Windows.

AddressWidth was also 64, which seemed safe to read directly. I treat Architecture 12, NumberOfCores 12, NumberOfLogicalProcessors 12, and AddressWidth 64 as fixed values that do not vary much when checked another way. At least on this machine, these fields rarely cause confusion.

L3CacheSize 0 is not evidence

L2CacheSize was 36864, or 36 MB. Dividing that by 12 gives 3 MB per core. The number itself is reasonably plausible. However, the WMI table alone did not tell me whether this was really the total L2 for all 12 cores or how values from clusters had been combined.

The problem was the 0 for L3CacheSize. It was too risky to interpret that as proof that the physical L3 cache did not exist. Some investigation suggested that the Windows WMI provider does not correctly populate L3CacheSize for ARM64 SoCs in some cases. At least in my environment, WMI alone could not distinguish “does not exist” from “was not reported.”

I therefore treat this 0 as “could not be confirmed through WMI,” not as proof that there is no L3. Confusing the two can invalidate a performance estimate that assumes a cache. The number 0 looks definitive, but this particular 0 was not enough to conclude anything. Writing “no L3” from this table alone would be unsafe.

ClockSpeed also looks like a fixed value

MaxClockSpeed and CurrentClockSpeed both matched at 3417. The value stayed 3417 under load and at idle.

My first interpretation went badly wrong here. I started reading it as “a high-performance SoC permanently pinned at its maximum clock” and almost built a power-consumption discussion around that. But if CurrentClockSpeed does not move when the state changes, it is hard to regard it as a dynamic frequency reading. Returning the nominal value unchanged is the more natural interpretation. It took me a while to notice that mistake.

WMI mixes fields that are populated and fields that are not meaningfully populated. The obvious lesson is not to trust them all equally, although seeing 3417 twice is particularly misleading.

Be careful with other zero values too

I also recorded the following values at the same time. Memory was 33,099,544 KB total and 7,279,708 KB free. The GPU was Qualcomm Adreno X1-85, and the built-in display was 2880x1920 at 60 Hz. Storage was an NVMe SSD, SDDPTQD-1T00-1124-WD, with 1,024,209,543,168 bytes. The last boot was August 1, 2026 at 13:32. These values were collected during normal use, not immediately after a reboot.

The GPU's AdapterRAM also returned 0. I interpret that as meaning an integrated GPU without dedicated memory, but here too it is better to separate “zero” from “not reported,” just as with L3.

Zero looks like a useful number. In WMI, however, 0 can combine “not set,” “unknown,” and “actually zero.” The L3CacheSize on Snapdragon X Elite and the AdapterRAM on Qualcomm Adreno X1-85 were the prompts to question that assumption.

Keep only the values that are usable

In summary, the values I can use directly are 12 for NumberOfCores, 12 for NumberOfLogicalProcessors, 12 for Architecture, and 64 for AddressWidth. They are fixed parts of the hardware topology and matched when checked by other methods.

The difficult values are 3417 for CurrentClockSpeed and 0 for L3CacheSize. The former does not appear to be dynamic, and the latter cannot establish whether the cache exists. L2CacheSize 36864 is in between: 36 MB is plausible, but I have not confirmed what unit of aggregation produced it.

What I learned on August 2, 2026 was that separating confidence in values matters more than collecting more values. I considered only four of the nine fields safe to use directly. I set out to inspect the Surface Pro 11th Edition topology and ended up thinking about how to handle WMI's reported values. Honestly, that was a little frustrating.

Hardware Architecture PowerShell
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Personal test notes from a Surface Pro 11th Edition with Snapdragon X Elite, used as a daily machine since May 2025. Results are based on direct measurements and do not represent any company or organization.